The present technique relates to an apparatus and method for performing branch prediction.
In order to seek to increase the performance of data processing systems, it is known to use branch prediction circuitry to seek to make predictions in respect of branch instructions. The predictions are then used by fetch circuitry to determine the instructions to be fetched from memory for execution by the processing circuitry of the data processing system. In particular, branch instructions can cause a change in flow of the instructions being executed, dependent on whether the branch is taken or not taken. If the system were merely to wait until the processing circuitry has executed the branch instruction (and hence it is known whether the branch is taken or not taken) before fetching the next instructions to be executed, this would have a significant impact on performance. Instead, branch prediction circuitry is used to seek to predict whether a branch will be taken or not taken, so that the fetch circuitry can continue to fetch instructions on the basis of that prediction. If the prediction later proves wrong, then the processing pipeline can be flushed, and processing can be resumed from the point of misprediction.
In order to enable the processing circuitry to be restored to a point where it can resume execution following a misprediction, it is necessary to store in checkpointing storage state information of the apparatus at a plurality of checkpoints, to hence enable the state information to be restored for one of those checkpoints in response to a flush event. Potentially, a significant amount of state information needs to be stored at each checkpoint, and this includes information maintained by the various components with the branch prediction circuitry. This can become particularly problematic in out-of-order (OoO) processing systems where the processing circuitry is able to execute instructions out-of-order with respect to original program order, and hence for which there can be a high degree of speculative processing being performed within the apparatus. Some types of branch prediction components used within branch prediction circuitry may require a significant amount of storage to be set aside within the checkpointing storage to store state information of those branch prediction components, and in OoO systems this storage requirement can make the use of such branch prediction components unattractive. Accordingly, it would be desirable to seek to reduce the storage requirements for state information associated with such branch prediction components.